In certain applications, the supply voltage for a circuit may be boosted from a low voltage to a higher voltage. Boosting voltages is applicable in many applications, including battery-powered devices. In particular, boosting voltages is applicable when legacy components are incorporated into new devices which would otherwise (i.e., without the legacy components) operate on less power. For example, a battery-powered device may include a battery pack which supplies approximately 1.8 Volts and legacy components which operate on approximately 2.4 Volts. In this case, the power would need to be boosted, or increased, from 1.8 Volts to 2.4 Volts in order to operate the legacy components.
FIG. 1 illustrates a conventional boost system 10. The depicted boost system 10 includes a chip 12 and a boost circuit 14. Power is supplied to the chip 12, for example, from a battery pack (not shown). Components that operate on the supplied voltage may receive power directly from the battery pack. However, components that operate on a higher voltage than the voltage supplied by the battery pack receive a boosted voltage signal from the boost circuit 14.
FIG. 2 illustrates a conventional boost system timing diagram 20. The depicted timing diagram 20 shows the voltage signal periodically dropping to a threshold voltage, VTH, and then being boosted to a boost voltage, VB. The voltage signal is boosted each time the boost circuit 14 generates a boost signal. For example, the boost circuit 14 generates boost signals at times t0, t1, t2, and t3. However, these boost signals are not synchronized with the reference signal, REF. Because the boost signals are not synchronized, some of the boost signals may occur, and the voltage signal may be boosted, at approximately the same time as a rising edge of the reference signal. For example, the boost signal at time t1 occurs at the same time as a rising edge of the reference signal. This occurrence can have negative effects because boosting the voltage signal is typically a noisy process—sharp and deterministic supply spikes may interrupt the operation of certain components on the chip 12.
The conventional solution to the noise generated during the boosting process is to design internal circuitry on the chip 12 so that it is robust and immune to the noise. As a result, additional design headroom and circuitry (e.g., an internal supply regulator) may be incorporated into the chip 12. However, these measures typically increase the cost of the chip 12.